In the prior art, operational amplifiers in integrated circuit MOS technology, such as described in a paper by B. J. Hosticka, IEEE Journal of Solid-State Circuits, Vol. SC-12, pp. 600-608, at p. 605, FIG. 6 (1977), have used depletion mode MOS transistors as load devices in conjunction with enhancement mode MOS transistors used as signal processing and current-source (driver) devices, in order to achieve relatively high gain. Such amplifiers are useful in a variety of analog signal contexts, but they suffer from such problems as insufficient gain, arising from threshold voltage variations in the depletion mode transistors in one semiconductor wafer relative to another, caused by such factors as unintentional wafer-to-wafer variations in semiconductor processing parameters, as well as from intentional process modifications. Consequently, these MOS amplifiers suffer from improper bias of both load and signal detecting transistors in the input stage, thereby taking the operation out of the desired transistor saturation region where gain is relatively high.
This problem in the prior art may be better appreciated from a brief discussion of the typical differential amplifier input stage of the prior art (FIG. 1). Semiconductor processing variations result in corresponding variations in the threshold voltages of the substantially identical depletion mode load transistors (M.sub.5, M.sub.7) from the proper value suitable for preserving the desired high incremental resistance in the circuit. Specifically, if in N-MOS (N-channel MOS) technology the threshold voltages of these load transistors are too high, then the DC resistance of these load transistors will also be too high, that is, they will be operating with too large a voltage drop; therefore, since enhancement mode transistor M.sub.10 acts as an electrical current-source, the voltage drop across the substantially identical enhancement mode signal input transistors (M.sub.1, M.sub.3) will be too low and these signal input transistors will not be operating in saturation, thereby reducing their operating transconductances g.sub.m ; hence, the gain of the stage will be undesirably low. On the other hand, if the threshold voltages of these load resistors (M.sub.5, M.sub.7) are too low, then their DC resistances will be too low and hence their operating voltage drops will be too low, so that they will not be operating in the saturation region, thereby reducing their incremental resistance; therefore, since gain is equal to the product of the incremental resistance of these load transistors and the transconductance of the signal input transistors, the gain of the stage will again be undesirably low. Accordingly, unless the threshold voltages of load transistors are tailored with sufficient precision to provide just the desired voltage drops for a given current-source, the biasing of the amplifier will not be suitable for achieving the desired high gain; however, such precision of processing control over threshold voltage is difficult, if at all possible to achieve even in present-day processing technology. Likewise, variations in supply voltages can similarly deteriorate the amplifier gain. Accordingly, it would be desirable to have an MOS amplifier circuit which does not require such precise control over the processing parameters and supply voltages.